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Proceedings Paper

VESTA: a system-level verification environment based on C++
Author(s): Mahendra V. Shahdadpuri; Javier Sosa; Héctor Navarro; Juan A. Montiel-Nelson; Roberto Sarmiento
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Paper Abstract

System verification is an important issue to do at every design step to ensure the complete system correctness. The verification effort is becoming more time-consuming due to the increase in design complexity. New environments are necessary to reduce the complexity of this task and, most importantly, reduce the time to develop it. Among the languages used in verification, C++ is powerful enough for encapsulating the necessary concepts in a set of classes and templates. This work introduces a framework that allows describing and verifying highly complex systems in a user-friendly and speedy way with C++ classes. These encapsulate hardware description and verification concepts and can be reused throughout a project and also in various development projects. Furthermore, the resulting libraries provide an easy-to-use interface for describing systems and writing test benches in C++, with a transparent connection to an HDL simulator. VESTA includes an advanced memory management with an extremely versatile linked list. The linked list access mode can change on-fly to a FIFO, a LIFO or a memory array access mode, among others. Experimental results demonstrate that the basic types provided by our verification environment excel the features of non-commercial solutions as Openvera or TestBuilder and commercial solutions such as 'e' language. Besides, the results achieved have shown significant productivity gain in creating reusable testbenches and in debugging simulation runs.

Paper Details

Date Published: 21 April 2003
PDF: 11 pages
Proc. SPIE 5117, VLSI Circuits and Systems, (21 April 2003); doi: 10.1117/12.498618
Show Author Affiliations
Mahendra V. Shahdadpuri, Univ. de Las Palmas de Gran Canaria (Spain)
Javier Sosa, Univ. de Las Palmas de Gran Canaria (Spain)
Héctor Navarro, Univ. de Las Palmas de Gran Canaria (Spain)
Juan A. Montiel-Nelson, Univ. de Las Palmas de Gran Canaria (Spain)
Roberto Sarmiento, Univ. de Las Palmas de Gran Canaria (Spain)


Published in SPIE Proceedings Vol. 5117:
VLSI Circuits and Systems
Jose Fco. Lopez; Juan A. Montiel-Nelson; Dimitris Pavlidis, Editor(s)

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