Share Email Print
cover

Proceedings Paper

Macromodel for exact computation of propagation delay time in GaAs and CMOS technologies
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

A new transient macromodel for the cells used in DCFL GaAs and CMOS digital design is introduced in this paper. The numerical solution determines accurate propagation delay times. The macromodel is based on the differential equation for the output voltage in terms of currents and capacitances. An straightforward treatment of the differential equation for an inverter in DCFL GaAs and CMOS has been obtained. It could be resolved numerically by a 4th order Runge Kutta method. Good agreement is obtained between the HSPICE simulation and the computation of the propagation delays for DCFL GaAs and CMOS basic gates: INV, NOR, OR and NAND. There is no error between HSPICE and our computation of propagation delay time for the high to low (tphl) and low to high (tplh) transitions. The propagation delay times for two types of transition were measured and compared with HSPICE. The results demonstrate that our approach matches with HSPICE with no error. The numerical method was programmed in C language. In addition, computation time analysis is provided and numerical solution is several orders of magnitude faster than HSPICE. Work is in progress to obtain the macromodel of a standard cell library for digital application both for a 0.6 microns E/D GaAs process (H-GaAsIV) from Vitesse Semiconductor and for a 0.18 microns logic/mixed-signal CMOS process (1P6M) from TSMC Corp.

Paper Details

Date Published: 21 April 2003
PDF: 11 pages
Proc. SPIE 5117, VLSI Circuits and Systems, (21 April 2003); doi: 10.1117/12.498586
Show Author Affiliations
Jose C. Garcia, Univ. de Las Palmas de Gran Canaria (Spain)
Juan A. Montiel-Nelson, Univ. de Las Palmas de Gran Canaria (Spain)
Javier Sosa, Univ. de Las Palmas de Gran Canaria (Spain)
Hector Navarro, Univ. de Las Palmas de Gran Canaria (Spain)
Roberto Sarmiento, Univ. de Las Palmas de Gran Canaria (Spain)


Published in SPIE Proceedings Vol. 5117:
VLSI Circuits and Systems
Jose Fco. Lopez; Juan A. Montiel-Nelson; Dimitris Pavlidis, Editor(s)

© SPIE. Terms of Use
Back to Top