Share Email Print

Proceedings Paper

Impact of downscaling on high-frequency noise performance of bulk and SOI MOSFETs
Author(s): Gilles Dambrine; C. Raynaud; M. Vanmackelberg; Francois Danneville; Guillaume Pailloncy; Sylvie Lepilliet; Jean Pierre Raskin
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

Parameters limiting the improvement of high frequency characteristics for deep sub micron MOSFETs (bulk and SOI) with the downscaling process of the channel gate length are analyzed experimentally. The high frequency performances of MOSFETs are generally characterized by the specific transit frequencies ft, fmax. ft and/or fmax, what is the good factor of merit to quantify the performance of a transistor ft, which corresponds to the transit frequency (when the gain is equal to 1) of the current gain, is an interesting criterion for high speed digital applications (speed and high swing) while fmax, which is defined as the transit frequency of the unilateral power gain is the best criterion for analogue microwave applications (amplifier, oscillators, etc.). fmax corresponds also to the transit frequency of the maximum available power gain (MAG) that is a realistic parameter of the optimization of microwave amplifiers. Moreover, at the opposite of ft, fmax includes the contribution of the gate resistance, which degrades the high frequency noise performance. The different contributions of the extrinsic and intrinsic parameters on these transit frequencies will be detailed. We will support this analysis by experimental results obtained from several deep sub micron SOI and bulk MOSFETs technologies. We will focus essentially this presentation on the different technological ways of optimization on the high frequency performance of MOSFETs and particularly concerning its high frequency noise characteristics.

Paper Details

Date Published: 12 May 2003
PDF: 15 pages
Proc. SPIE 5113, Noise in Devices and Circuits, (12 May 2003); doi: 10.1117/12.497141
Show Author Affiliations
Gilles Dambrine, Institut d'Electronique, de Microelectronique et de Nanotechnologie (France)
C. Raynaud, STMicroelectronics (France)
M. Vanmackelberg, Institut d'Electronique, de Microelectronique et de Nanotechnologie (France)
Francois Danneville, Institut d'Electronique, de Microelectronique et de Nanotechnologie (France)
Guillaume Pailloncy, Institut d'Electronique, de Microelectronique et de Nanotechnologie (France)
Sylvie Lepilliet, Institut d'Electronique, de Microelectronique et de Nanotechnologie (France)
Jean Pierre Raskin, Univ. Catholique de Louvain (Belgium)

Published in SPIE Proceedings Vol. 5113:
Noise in Devices and Circuits
M. Jamal Deen; Zeynep Celik-Butler; Michael E. Levinshtein, Editor(s)

© SPIE. Terms of Use
Back to Top