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Proceedings Paper

Compact modeling of noise for RF CMOS circuit
Author(s): Andries J. Scholten; Luuk F. Tiemeijer; Ronald van Langevelde; Ramon J. Havens; Adrie T. A. Zegers-van Duijnhoven; Randy de Kort; Vincent C. Venezia; Dirk B. M. Klaassen
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Paper Abstract

We study the the thermal noise of short-channel NMOS transistors in a commercially available 0.13 micron CMOS technology. The experimental results are modeled with a non-quasi-static RF model, based on the principle of channel segmentation. The model is capable of predicting both drain and gate current noise accurately, without fitting any parmeters to the measured noise data. An essential ingredient of the model is the gate resistance, which is shown to dominate the gate current noise. In our optimized device layouts, this gate resistance is mainly determined by the silicide-to-polysilicon contact resistance.

Paper Details

Date Published: 12 May 2003
PDF: 12 pages
Proc. SPIE 5113, Noise in Devices and Circuits, (12 May 2003); doi: 10.1117/12.492939
Show Author Affiliations
Andries J. Scholten, Philips Research Labs. (Netherlands)
Luuk F. Tiemeijer, Philips Research Labs. (Netherlands)
Ronald van Langevelde, Philips Research Labs. (Netherlands)
Ramon J. Havens, Philips Research Labs. (Netherlands)
Adrie T. A. Zegers-van Duijnhoven, Philips Research Labs. (Netherlands)
Randy de Kort, Philips Research Labs. (Netherlands)
Vincent C. Venezia, Philips Research Leuven (Belgium)
Dirk B. M. Klaassen, Philips Research Labs. (Netherlands)

Published in SPIE Proceedings Vol. 5113:
Noise in Devices and Circuits
M. Jamal Deen; Zeynep Celik-Butler; Michael E. Levinshtein, Editor(s)

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