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Proceedings Paper

Polysilicon etching for nanometer-scale features
Author(s): Jean Lajzerowicz; Serge V. Tedesco; Christophe Pierrat; D. Muyard; M. C. Taccussel; Philippe Laporte
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Paper Abstract

Polysilicon etching is a critical process for VLSI. Recently1, HBr appeared to be the best choice for a good selectivity versus oxide and a good profile control. In this paper, we investigated a HBr-Cl2 chemistry in a classical RIE system at pressure below 15 Pa. The etching was performed with either resist or oxide masks. Results were optimized through statistical experimental designs. The influence of the different process parameters: power, pressure and gas flows were detailed. Etching of 100nm patterns, stopping within 70A thin gate oxide (even with a long overetch time) was achieved using the developped process.

Paper Details

Date Published: 1 March 1991
PDF: 10 pages
Proc. SPIE 1392, Advanced Techniques for Integrated Circuit Processing, (1 March 1991); doi: 10.1117/12.48916
Show Author Affiliations
Jean Lajzerowicz, LETI/Commissariat a l'Energie Atomique (France)
Serge V. Tedesco, LETI/Commissariat a l'Energie Atomique (France)
Christophe Pierrat, LETI/Commissariat a l'Energie Atomique (France)
D. Muyard, LETI/Commissariat a l'Energie Atomique (France)
M. C. Taccussel, LETI/Commissariat a l'Energie Atomique (France)
Philippe Laporte, LETI/Commissariat a l'Energie Atomique (France)

Published in SPIE Proceedings Vol. 1392:
Advanced Techniques for Integrated Circuit Processing
James A. Bondur; Terry R. Turner, Editor(s)

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