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Proceedings Paper

DIVAS: an integrated networked system for mask defect dispositioning and defect management
Author(s): Saghir Munir; Dan Bald; Vikram Tolani; Firoz Ghadiali
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Paper Abstract

Mask quality is a prime concern to the Intel Mask Operation (IMO) and the Intel wafer fabrication customers. Extreme concern is taken to inspect and repair all defects before shipment. Given that the classification and repair of defects detected by inspection systems is labor intensive, the procedure is prone to human error. Futhermore, since operators manually disposition hundreds of defects each day, it is virtually impossible to eliminate all misclassifications. Due to diffraction effects, not all defects resolve on a wafer. Hence, a defect that an operator may classify as 'real' may indeed be 'lithographically insignifincant'. Conversely an operator may miss a defect that prints, causing a serious reduction in product yield. The DIVAS (Defect, Inspection, Viewing, Archiving and Simulation) system has been described previously and was developed to address these manual classification issues. This paper outlines the fully automated system deployed in a production environment.

Paper Details

Date Published: 2 July 2003
PDF: 9 pages
Proc. SPIE 5043, Cost and Performance in Integrated Circuit Creation, (2 July 2003); doi: 10.1117/12.487634
Show Author Affiliations
Saghir Munir, Intel Corp. (United States)
Dan Bald, Intel Corp. (United States)
Vikram Tolani, Intel Corp. (United States)
Firoz Ghadiali, Intel Corp. (United States)

Published in SPIE Proceedings Vol. 5043:
Cost and Performance in Integrated Circuit Creation
Alfred K. K. Wong; Kevin M. Monahan, Editor(s)

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