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Proceedings Paper

Application of CPL reticle technology for the 65- and 50-nm node
Author(s): Will Conley; Douglas J. Van Den Broeke; Robert John Socha; Wei Wu; Lloyd C. Litt; Kevin Lucas; Carla M. Nelson-Thomas; Bernard J. Roman; J. Fung Chen; Kurt E. Wampler; Thomas L. Laidig; Stephen D. Hsu; Erika Schaefer; Shawn Cassel; Linda Yu; Bryan S. Kasprowicz; Christopher J. Progler; John S. Petersen; David J. Gerold; Mark John Maslow
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Paper Abstract

Each generation of semiconductor device technology drive new and interesting resolution enhancement technology (RET’s). The race to smaller and smaller geometry’s has forced device manufacturers to k1’s approaching 0.40. The authors have been investigating the use of Chromeless phase-shifting masks (CLM) exposed with ArF, high numerical aperture (NA), and off-axis illumination (OAI) has been shown to produce production worthy sub-100nm resist patterns with acceptable overlapped process window across feature pitch. There have been a number of authors who have investigated CLM in the past but the technology has never received mainstream attention due to constraints such as wet quartz etch during mask fabrication, limited approach to optical proximity correction (OPC), and exposure tool limitations such as on-axis illumination and too low of NA. With novel binary halftone OPC and a capable modern mask making process, it has become possible to achieve global and local pattern optimization of the phase shifter for a given layout especially for patterning features with dimension at sub-half-exposure wavelength. The authors have built a number of test structures that require superior 2D control for SRAM gate structures. In this paper the authors will focus on image process integration for the 65nm node. Emphasis on pattern layout, mask fabrication and image processing will be discussed. Furthermore, the authors will discuss defect printing, inspection and repair, mask error enhancement factor (MEEF) of 2D structures coupled with phase error, layout, and mask fabrication specifications.

Paper Details

Date Published: 26 June 2003
PDF: 7 pages
Proc. SPIE 5040, Optical Microlithography XVI, (26 June 2003); doi: 10.1117/12.485515
Show Author Affiliations
Will Conley, Motorola, Inc. (United States)
Douglas J. Van Den Broeke, ASML (United States)
Robert John Socha, ASML (United States)
Wei Wu, Motorola, Inc. (United States)
Lloyd C. Litt, Motorola, Inc. (United States)
Kevin Lucas, Motorola, Inc. (United States)
Carla M. Nelson-Thomas, Motorola, Inc. (United States)
Bernard J. Roman, Motorola, Inc. (United States)
J. Fung Chen, ASML (United States)
Kurt E. Wampler, ASML (United States)
Thomas L. Laidig, ASML (United States)
Stephen D. Hsu, ASML (United States)
Erika Schaefer, ASML (United States)
Shawn Cassel, ASML (United States)
Linda Yu, ASML (United States)
Bryan S. Kasprowicz, Photronics Inc. (United States)
Christopher J. Progler, Photronics Inc. (United States)
John S. Petersen, Petersen Advanced Lithography, Inc. (United States)
David J. Gerold, Petersen Advanced Lithography, Inc. (United States)
Mark John Maslow, Petersen Advanced Lithography, Inc. (United States)


Published in SPIE Proceedings Vol. 5040:
Optical Microlithography XVI
Anthony Yen, Editor(s)

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