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Proceedings Paper

Process latitude extension in low-k1 DRAM lithography using specific layer-oriented illumination design
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Paper Abstract

Improvement of process latitude is tested in typical DRAM patterns by using the optimized illumination for each layer pattern. The optimized illumination for a specific layer is generated by modifying the Fourier transformed image of the layer and by using in-house illumination optimization program, which can simulate the maximum process latitude. These illumination shapes are compared with each other, and it is confirmed that both illuminations are similar in shape. The typical DRAM patterns are exposed using the optimized illuminations, and the process latitude is compared with typical annular illumination cases. It is certain that the process latitude using the optimized illumination is greater than the high sigma annular illumination. By using the optimized illumination, the enlarged process latitude makes it possible to use lower grade tools for a critical layer. It is expected that the lifetime of low-grade exposure tools can be extended by this illumination optimization technique.

Paper Details

Date Published: 26 June 2003
PDF: 6 pages
Proc. SPIE 5040, Optical Microlithography XVI, (26 June 2003); doi: 10.1117/12.485384
Show Author Affiliations
Young Seog Kang, Samsung Electronics Co., Ltd. (South Korea)
Dong-Seok Nam, Samsung Electronics Co., Ltd. (South Korea)
Chan Hwang, Samsung Electronics Co., Ltd. (South Korea)
Sang-Gyun Woo, Samsung Electronics Co., Ltd. (South Korea)
Han-Ku Cho, Samsung Electronics Co., Ltd. (South Korea)
Woo-Sung Han, Samsung Electronics Co., Ltd. (South Korea)

Published in SPIE Proceedings Vol. 5040:
Optical Microlithography XVI
Anthony Yen, Editor(s)

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