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Proceedings Paper

Understanding the operating expense relationships of layouts on excimer photo tools
Author(s): Dennis B. Ames
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Paper Abstract

Chip size as a function of field fill on wafer layouts, and their effect on thruput, has been well understood as a loss of both opportunity and cost of operation (COO), as a function of depreciated capital expense. The resultant effects on consumable replacement time, expense and budgeting has not been as clear-cut. This paper will outline the consequences that field fill has with respect to increased laser, and litho tool optic train, consumable usages as well as availability detractors to replace these components. Resulting losses due to increased cost of operation, and additional consumable spending and usages will be explored.

Paper Details

Date Published: 2 July 2003
PDF: 4 pages
Proc. SPIE 5043, Cost and Performance in Integrated Circuit Creation, (2 July 2003); doi: 10.1117/12.485273
Show Author Affiliations
Dennis B. Ames, IBM Microelectronics Div. (United States)


Published in SPIE Proceedings Vol. 5043:
Cost and Performance in Integrated Circuit Creation
Alfred K. K. Wong; Kevin M. Monahan, Editor(s)

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