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Proceedings Paper

LithoCell-integrated critical dimension metrology
Author(s): J. Broc Stirton; Clinton W. Miller; Anita Viswanathan; Makoto Miyagi; Lawrence Lane; Michael A. Laughery; Tarun Parikh; Kin Chung Chan; Apo Sezginer
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Paper Abstract

As the semiconductor industry continues the transition to 300mm wafer factories, not only does the cost per wafer increase dramatically, but the number of eligible die (assuming equal die size) more than doubles. Given the parallel transition to design rules of 90nm and below, both the cost of production and the potential revenue from a 300mm wafer are vastly higher than that of a current 200mm wafer. For this reason alone, it is essential that wafer jeopardy, or the number of wafers processed between metrology events, be reduced dramatically from the levels in a typical 200mm wafer line. The most promising method for achieving this is process tool-integrated metrology. Such systems allow rapid (in some cases near instantaneous) feedback on the process. Such a data stream, as input to an Advanced Process Control (APC) system, provides a volume of data and feedback lag time unparalleled by standalone metrology. In this case, critical dimension (CD) metrology is provided by a scatterometer integrated on a 200mm TEL CLEAN TRACK - ACT 8. The data, available on a wafer-by-wafer basis, is uploaded to the factory host where the APC application can update its state estimation before the entire lot has even completed processing.

Paper Details

Date Published: 15 July 2003
PDF: 6 pages
Proc. SPIE 5041, Process and Materials Characterization and Diagnostics in IC Manufacturing, (15 July 2003); doi: 10.1117/12.485241
Show Author Affiliations
J. Broc Stirton, Advanced Micro Devices, Inc. (United States)
Clinton W. Miller, Advanced Micro Devices, Inc. (United States)
Anita Viswanathan, Tokyo Electron Texas LLC (United States)
Makoto Miyagi, Tokyo Electron Texas LLC (United States)
Lawrence Lane, Timbre Technologies Inc. (United States)
Michael A. Laughery, Timbre Technologies Inc. (United States)
Tarun Parikh, Tokyo Electron America, Inc. (United States)
Kin Chung Chan, Sensys Instruments, Inc. (United States)
Apo Sezginer, Sensys Instruments, Inc. (United States)


Published in SPIE Proceedings Vol. 5041:
Process and Materials Characterization and Diagnostics in IC Manufacturing
Kenneth W. Tobin; Iraj Emami, Editor(s)

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