Share Email Print

Proceedings Paper

Optimized thick film processing for bumping layers
Author(s): Stanley F. Wanat; Robert Plass; Ernesto S. Sison; Hong Zhuang; Ping-Hung Lu; Clifford Hamel; Jeffrey M. Guevremont
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

As information densities increase with each generation of microchips, there is a concurrent reduction in feature sizes and even chip dimensions. With reduced chip sizes, the horizontal space for connectors on the back side of the chips is also limited. Most resists are not thick enough to accommodate the height of the connector posts needed. As a consequence, the plated posts or “bumps” overfill the imaged via holes thereby providing a mushroom effect that reduces usable horizontal space for other connectors. We have formulated a high solids photoresist (AZ 50 XT) capable of depositing 60-90μm single coat resist films. By optimizing processing conditions, reasonably straight side-wall geometries are possible. The importance of processing parameters (baking, exposure and development) are heightened by the inherent difficulty in balancing residual solvent against reasonable processing times needed for commercial use. This paper summarizes a joint program between Clariant and SUSS Microtec in optimizing the use of AZ 50 XT resist for bumping layer applications.

Paper Details

Date Published: 12 June 2003
PDF: 8 pages
Proc. SPIE 5039, Advances in Resist Technology and Processing XX, (12 June 2003); doi: 10.1117/12.485181
Show Author Affiliations
Stanley F. Wanat, Clariant Corp. (United States)
Robert Plass, Clariant Corp. (United States)
Ernesto S. Sison, Clariant Corp. (United States)
Hong Zhuang, Clariant Corp. (United States)
Ping-Hung Lu, Clariant Corp. (United States)
Clifford Hamel, SUSS MicroTec, Inc. (United States)
Jeffrey M. Guevremont, SUSS MicroTec, Inc. (United States)

Published in SPIE Proceedings Vol. 5039:
Advances in Resist Technology and Processing XX
Theodore H. Fedynyshyn, Editor(s)

© SPIE. Terms of Use
Back to Top