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Proceedings Paper

Improvement of resist pattern collapse
Author(s): Manabu Watanabe; Yoichi Tomo; Masaki Yamabe; Yukio Kiba; Keiichi Tanaka; Ryoichiro Naito
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Paper Abstract

In this study, we investigated resist pattern collapse during the resist development process. We evaluated the effect of a simple improvement such as rinse-liquid sequencing and rinsing using surfactants. First, we controlled the wafer spinning speed during the rinse-liquid flow step to reduce liquid flow shock. Using this approach, we obtained a 110-nm L/S (line and space) structure with no pattern collapse. However, this technique has only a small effect on preventing pattern collapse with sub-100-nm devices. By using a rinse process with a surfactant, we could control pattern collapse with 100-nm L/S or smaller patterns. Finally, we have succeeded in controlling pattern collapse of 70-nm L/S patterns (aspects ratio of 4.6) using a surfactant during the rinse process. These two simple methods are a significant improvement over conventional rinse processes. These process improvements are available for 90-nm (and smaller) design rules and are applicable for a single layer resists.

Paper Details

Date Published: 16 June 2003
PDF: 9 pages
Proc. SPIE 5037, Emerging Lithographic Technologies VII, (16 June 2003); doi: 10.1117/12.484978
Show Author Affiliations
Manabu Watanabe, Semiconductor Leading Edge Technologies, Inc. (Japan)
Yoichi Tomo, Semiconductor Leading Edge Technologies, Inc. (Japan)
Masaki Yamabe, Semiconductor Leading Edge Technologies, Inc. (Japan)
Yukio Kiba, Tokyo Electron Kyushu Ltd. (Japan)
Keiichi Tanaka, Tokyo Electron Kyushu Ltd. (Japan)
Ryoichiro Naito, Tokyo Electron Kyushu Ltd. (Japan)


Published in SPIE Proceedings Vol. 5037:
Emerging Lithographic Technologies VII
Roxann L. Engelstad, Editor(s)

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