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Proceedings Paper

Dedicated architecture for topological operators for grayscale image processing
Author(s): Mohamed Akil
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Paper Abstract

In this paper we present the hardware implementation of image segmentation chain based on topological operators on a mixed FPGA/DSP architecture. These operators can segment a bi-class image into regions. This original method is based on some low-level operators, which do not need parameters. This is more interesting in architecture viewpoint, due to its simplicity and the fact that these low-level operators are used somehow in different phases of algorithm, hence an important reduction of used FPGA surface. Beside, the result of the segmentaion consists of closed and thin contours. This method is based on four basic operators which modify the topology of the image in order to segment it. The first operator of the image simplifies the topology of the image while preserving its gray level informations. A real image once simplified is full of irregular regions or points, due the noise or the texture of the regions. The second and third operators selectively eliminate respectively the irregular points and irregular regions. The fourth operator is to reconstruct the image. In this paper we present the implementation of these four operators on PCI architecture based on a FPGA circuit and a DSP processor.

Paper Details

Date Published: 14 April 2003
PDF: 8 pages
Proc. SPIE 5012, Real-Time Imaging VII, (14 April 2003); doi: 10.1117/12.477501
Show Author Affiliations
Mohamed Akil, Groupe ESIEE (France)

Published in SPIE Proceedings Vol. 5012:
Real-Time Imaging VII
Nasser Kehtarnavaz; Phillip A. Laplante, Editor(s)

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