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Proceedings Paper

Lithography technology trend for DRAM devices
Author(s): Woo-Sung Han
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Paper Abstract

Lithography technology trend is described in view of DRAM devices. Lowering k1 factor is a way to push the existing exposure tools further down to where an improved tool might take the place. Four different aspects have been studied to lower k1 factor: resist and resist process, design layout, exposure tool, and complex mask. Thin resist, silicon containing bi-layer resist process, and chemical attaching process (CAP) allows k1 factor. In a low k1 factor regime, the importance of a defect level control and CD shrinkage control is mentioned. A litho-friendly design proves to be very effective. From exposure tool point of view, flare effect and lens aberration effect are stressed along with proposing a customized OAI, which proves to be a good method to lower k1 factor. A novel complex mask with heavy OPC features is introduced. If all or most of the techniques suggested above are realized, moving toward k1 facto of 0.3 or below will come true. With the era of low k1 factor of 0.3 or below, ArF lithography can be extended to a device generation of approximately 65 nm which F2 lithography was thought to be used.

Paper Details

Date Published: 1 August 2002
PDF: 11 pages
Proc. SPIE 4754, Photomask and Next-Generation Lithography Mask Technology IX, (1 August 2002); doi: 10.1117/12.477003
Show Author Affiliations
Woo-Sung Han, Samsung Electronics Co., Ltd. (South Korea)


Published in SPIE Proceedings Vol. 4754:
Photomask and Next-Generation Lithography Mask Technology IX
Hiroichi Kawahira, Editor(s)

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