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Proceedings Paper

Optical lithography simulation considering impact of mask errors
Author(s): Hee-Bom Kim; Won-Kwang Ma; Chang-Nam Ahn; Ki-Soo Shin
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Paper Abstract

With smaller features sizes and higher pattern densities on high-end mask for DUV lithography, pattern fidelity on mask features becomes essential for optical proximity correction (OPC) performance. But some degree of corner rounding on the mask is inevitable even using the latest writing tool. The corner rounding radius on mask is mainly determined by the resolution of writing tool, mask resist process and chrome etching process following. In this paper, we will first discuss corner rounding impact for two-dimensional pattern applied OPC. Secondly modeling mask patterning process by applying diffused aerial image model (DAIM). Thirdly we will compare mask simulation results and mask SEM image for various mask masking process. Finally, we will examine a new simulation method to enhance the accuracy of wafer patterning simulation by using not CAD layout but mask layout extracted from mask patterning simulation.

Paper Details

Date Published: 30 July 2002
PDF: 9 pages
Proc. SPIE 4691, Optical Microlithography XV, (30 July 2002); doi: 10.1117/12.474508
Show Author Affiliations
Hee-Bom Kim, Hynix Semiconductor, Inc. (South Korea)
Won-Kwang Ma, Hynix Semiconductor, Inc. (South Korea)
Chang-Nam Ahn, Hynix Semiconductor, Inc. (South Korea)
Ki-Soo Shin, Hynix Semiconductor, Inc. (South Korea)

Published in SPIE Proceedings Vol. 4691:
Optical Microlithography XV
Anthony Yen, Editor(s)

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