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Proceedings Paper

3.2-Gb/s VCSEL driver implemented in 0.18-um CMOS
Author(s): Alan E.L. Chuah; Michael B. Venditti; Fei Liu; David V. Plant
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Paper Abstract

We report on the performance of a 3.2 Gb/s VCSEL driver implemented in foundry n-well 0.18μm CMOS technology. The VCSEL driver utilizes a novel push-pull circuit topology that pushes and pulls modulation current into and out of the VCSEL cavity thus producing symmetric rising and falling edges. Using a commercial VCSEL with a threshold current of 1.2 mA and a slope efficiency of 0.3 mW/mA, the circuit was operated at 1.25, 2.5 and 3.2 Gb/s and produced 2.5 mW of average optical power.

Paper Details

Date Published: 17 February 2003
PDF: 5 pages
Proc. SPIE 4833, Applications of Photonic Technology 5, (17 February 2003); doi: 10.1117/12.474329
Show Author Affiliations
Alan E.L. Chuah, Intel Microelectronics (M) Sdn. Bhd. (United States)
Michael B. Venditti, McGill Univ. (Canada)
Fei Liu, McGill Univ. (Canada)
David V. Plant, McGill Univ. (Canada)

Published in SPIE Proceedings Vol. 4833:
Applications of Photonic Technology 5

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