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Proceedings Paper

Method to improve the throughput and retain the CD performance for DUV process
Author(s): Yung-Tsung Hsiao; Ta-Chung Liu; Lee-Jean Chiu; Chih-You Chen; Chin-Yu Ku
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Paper Abstract

One of the major problems for DUV resists is linewidth change owing to Post Exposure Delay (PED) and PEB conditions. In this work, the influence of PED and PEB baking conditions have been investigated based on the measured linewidth, i.e., critical dimension (CD). Our previously established model has been employed to describe the linewidth for various resists and process conditions. Based on our analyzed results, the process flow of wafer can be modified to improve the throughput, and still retain the CD stability and resist profile control.

Paper Details

Date Published: 24 July 2002
PDF: 10 pages
Proc. SPIE 4690, Advances in Resist Technology and Processing XIX, (24 July 2002); doi: 10.1117/12.474271
Show Author Affiliations
Yung-Tsung Hsiao, National Taipei Univ. of Technology (Taiwan)
Ta-Chung Liu, National Taipei Univ. of Technology (Taiwan)
Lee-Jean Chiu, Vanguard International Semiconductor Corp. (Taiwan)
Chih-You Chen, Vanguard International Semiconductor Corp. (Taiwan)
Chin-Yu Ku, Vanguard International Semiconductor Corp. (Taiwan)

Published in SPIE Proceedings Vol. 4690:
Advances in Resist Technology and Processing XIX
Theodore H. Fedynyshyn, Editor(s)

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