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Proceedings Paper

Pattern transfer processes for 157-nm lithography
Author(s): Seiro Miyoshi; Takamitsu Furukawa; Hiroyuki Watanabe; Shigeo Irie; Toshiro Itani
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Paper Abstract

We describe and evaluate three kinds of pattern transfer processes that are suitable for 157-nm lithography. These transfer processes are 1) a hard mask (HM) process using SiO as a HM material, 2) a HM process using an organic bottom anti-reflecting coating (BARC)/SiN structure, and 3) a bi- layer process using a silicon-containing resist and an organic film as the bottom layer. In all of these processes, the underlayer fo the resist acts as an anti-reflecting layer. For the HM processes, we patterned a newly developed fluorine-containing resist using a 157-nm microstepper, and transferred the resist patterns to the hard mask by reactive ion etching (RIE) with minimal critical dimension shift. Using the HM pattern, we then fabricated a 65nm Wsi/poly-Si gate pattern using a high-NA microstepper (NA=0.85). With the bi-layer process, we transferred a 60nm 1:1 lines and spaces pattern of a newly developed silicon-containing resist to a 300nm-thick organic film by RIE. The fabrication of a 65nm 1:1 gate pattern and 60nm 1:1 organic film patten clearly demonstrated that 157-nm lithography is the best candidate for fabricating sub-70nm node devices.

Paper Details

Date Published: 24 July 2002
PDF: 12 pages
Proc. SPIE 4690, Advances in Resist Technology and Processing XIX, (24 July 2002); doi: 10.1117/12.474221
Show Author Affiliations
Seiro Miyoshi, Semiconductor Leading Edge Technologies, Inc. (Japan)
Takamitsu Furukawa, Semiconductor Leading Edge Technologies, Inc. (Japan)
Hiroyuki Watanabe, Semiconductor Leading Edge Technologies, Inc. (Japan)
Shigeo Irie, Semiconductor Leading Edge Technologies, Inc. (Japan)
Toshiro Itani, Semiconductor Leading Edge Technologies, Inc. (Japan)


Published in SPIE Proceedings Vol. 4690:
Advances in Resist Technology and Processing XIX
Theodore H. Fedynyshyn, Editor(s)

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