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Proceedings Paper

Comparative analysis of advanced poly-silicon thin-film transistor architectures for drain field relief
Author(s): Guglielmo Fortunato; Antonio Valletta; Alessandra Bonfiglietti; Massimo Cuscuna; Paolo Gaucci; Luigi Mariucci; Alessandro Pecora; Stan D. Brotherton; J. Richard Ayres
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Paper Abstract

Two different drain field relief architectures, lightly doped drain (LDD) and gate overlapped LDD (GOLDD), for polysilicon TFT have been analyzed and compared to conventional self-aligned (SA) devices. The introduction of LDD regions improves off-current, kink effect and electrical stability if compared to SA devices. However, a parasitic resistance effect is also introduced, thus limiting the benefits of LDD structures. GOLDD architecture overcomes this drawback, but, more importantly, show improved off-current and kink effect and exceptionally high electrical stability. The experimental results have been explained by analyzing the electric field distributions, obtained by two-dimensional numerical simulations, while a new tool to explain hot-carrier induced modifications in polysilicon TFTs was developed.

Paper Details

Date Published: 16 May 2003
PDF: 15 pages
Proc. SPIE 5004, Poly-Silicon Thin Film Transistor Technology and Applications in Displays and Other Novel Technology Areas, (16 May 2003); doi: 10.1117/12.473883
Show Author Affiliations
Guglielmo Fortunato, IFN-CNR (Italy)
Antonio Valletta, IFN-CNR (Italy)
Alessandra Bonfiglietti, IFN-CNR (Italy)
Massimo Cuscuna, IFM-CNR (Italy)
Paolo Gaucci, IFN-CNR (Italy)
Luigi Mariucci, IFN-CNR (Italy)
Alessandro Pecora, IFN-CNR (Italy)
Stan D. Brotherton, Philips Research Labs. (United Kingdom)
J. Richard Ayres, Philips Research Labs. (United Kingdom)


Published in SPIE Proceedings Vol. 5004:
Poly-Silicon Thin Film Transistor Technology and Applications in Displays and Other Novel Technology Areas
Apostolos T. Voutsas, Editor(s)

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