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Proceedings Paper

Application of intentional defect arrays for assessing wafer inspection tool capabilities
Author(s): Abbie L. Warrick; Amy B. Engbrecht; Richard J. Jarvis
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Paper Abstract

Substantial effort is underway to provide a more scientific approach for understanding and assessing the capabilities of current and emerging patterned wafer inspection tools. These elaborate and highly sensitive tools require time-consuming and complex analytical methods to accurately estimate the number of significant defects per specified area while minimizing detection of false and nuisance defects. Determining an inspection tool's capabilities-including accurately estimating capture rates, false count rates, and nuisance rates-requires the employment of relevant bench marking wafers containing well known and characterized defects in product-like patterns. Using intentionally created defects with an established size, location, and process layer allows for assessing a given inspection technology and evaluating how well the software executes the underlying detection physics through validation of its output against a known. International SEMATECH has created a set of reticles that contain intentional defects arrays within product-like patterns and layers. Each IDA die contains separate areas of metal line widths of 0.18 micrometers , 0.25 micrometers and 0.35 micrometers incorporating defect sizes at 25 percent, 50 percent and 100 percent of the feature size. Advanced lithographic capabilities were used to print the array die on 200 mm wafers using short-loop recipes for simulating gate and dual damascene copper process flows. This paper describes the methodology for the IDA wafer creation and the application of the wafers in tool bench marking, took setup, tool monitoring and tool matching.

Paper Details

Date Published: 16 July 2002
PDF: 9 pages
Proc. SPIE 4689, Metrology, Inspection, and Process Control for Microlithography XVI, (16 July 2002); doi: 10.1117/12.473494
Show Author Affiliations
Abbie L. Warrick, Lawrence Livermore National Lab. and International SEMATECH (United States)
Amy B. Engbrecht, Advanced Micro Devices, Inc. and International SEMATECH (United States)
Richard J. Jarvis, Advanced Micro Devices, Inc. and International SEMATECH (United States)

Published in SPIE Proceedings Vol. 4689:
Metrology, Inspection, and Process Control for Microlithography XVI
Daniel J. C. Herr, Editor(s)

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