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Proceedings Paper

40-Gb/s 4 x 10 array VCSEL driver in 0.35-mm CMOS technology
Author(s): Hyung-Soo Kim; Sung-Jae Jung; Hee-Hyun Lee; Doo-Gun Kim; Young-Wan Choi
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Paper Abstract

In this paper, we present a 40 Gb/s VCSEL driver (4 x 10 channels, 1 Gbps/ch) designed and fabricated in HYNIX 0.35 micrometers 2-poly 4-matel CMOS technology. The CMOS driver designed for a free space optical interconnect system consists of two NMOS for driving a VCSEL and protection circuit rejecting influence of electrostatic discharge (ESD) or unexpected input signal with several tens voltage amplitude. Two NMOS with CMOS channel length of 0.4 micrometers and width of 100 micrometers are used for adjusting dc bias current from 0 to 27 mA and ac modulation current from 0 to 13.8 mA. Protection circuit is made of two diodes. The purpose of the protection circuit is to permit the input modulation voltage range only from -5 to 5 V.

Paper Details

Date Published: 3 June 2002
PDF: 8 pages
Proc. SPIE 4652, Optoelectronic Interconnects, Integrated Circuits, and Packaging, (3 June 2002); doi: 10.1117/12.469570
Show Author Affiliations
Hyung-Soo Kim, Chung-Ang Univ. (South Korea)
Sung-Jae Jung, Chung-Ang Univ. (South Korea)
Hee-Hyun Lee, Chung-Ang Univ. (South Korea)
Doo-Gun Kim, Chung-Ang Univ. (South Korea)
Young-Wan Choi, Chung-Ang Univ. (South Korea)

Published in SPIE Proceedings Vol. 4652:
Optoelectronic Interconnects, Integrated Circuits, and Packaging
Louay A. Eldada; Randy A. Heyler; John R. Rowlette; John R. Rowlette; Randy A. Heyler, Editor(s)

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