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Proceedings Paper

Optimum scaling theory to minimize the roll-off of threshold voltage for nanoscale MOSFET
Author(s): Gyu-sung Lim; Suk-woong Ko; Jae-hong Kim; Jong-in Lee; Hak-kee Jung
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Paper Abstract

In this paper, we have presented the simulation results about threshold voltage of nano scale lightly doped drain (LDD) MOSFET with halo doping profile. Device size is scaled down from 100nm to 40nm using generalized scaling. We have investigated the threshold voltage for constant field scaling and constant voltage scaling using the Van Dort Quantum Correction Model (QM) and direct tunneling current for each gate oxide thickness. We know that threshold voltage is decreasing in the constant field scaling and increasing in the constant voltage scaling when gate length is reducing, and direct tunneling current is increasing when gate oxide thickness is reducing. To minimize the roll-off characteristics for threshold voltage of MOSFET with decreasing channel length, we know α value must be nearly 1 in the generalized scaling.

Paper Details

Date Published: 14 November 2002
PDF: 8 pages
Proc. SPIE 4935, Smart Structures, Devices, and Systems, (14 November 2002); doi: 10.1117/12.469074
Show Author Affiliations
Gyu-sung Lim, Kunsan National Univ. (South Korea)
Suk-woong Ko, Kunsan National Univ. (South Korea)
Jae-hong Kim, Kunsan National Univ. (South Korea)
Jong-in Lee, Kunsan National Univ. (South Korea)
Hak-kee Jung, Kunsan National Univ. (South Korea)

Published in SPIE Proceedings Vol. 4935:
Smart Structures, Devices, and Systems
Erol C. Harvey; Derek Abbott; Vijay K. Varadan, Editor(s)

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