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Proceedings Paper

Reticle defect management solutions for a wafer fab
Author(s): Robert C. Muller; Glen W. Scheid; Neal P. Callan
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Paper Abstract

ASIC companies face consistent pressure to reduce cost, improve quality, and decrease the time to production for reticles used in integrated circuit fabrication. In order to meet these objectives, the Reticle Engineering group at LSI Logic has developed an efficient and accurate defect control methodology. Three case studies in this paper highlight a unique defect management strategy. The scenarios describe rejecting a reticle to the vendor, releasing a reticle to the fab while deeming a defect innocuous, and tracking a reticle through production with a known yield impacting defect. The defect management solutions highlighted in this paper include a web based defect classification and disposition system to supplement the Lasertec MD2000 die to die inspection tool, virtual inking of affected die, and a production process flow for defect verification on silicon wafer prints. Quantitative results are shown, illustrating the elimination of vendor induced repeaters, improvements in baseline defect density, and improved cycle time for defect analysis and inspection flows.

Paper Details

Date Published: 27 December 2002
PDF: 10 pages
Proc. SPIE 4889, 22nd Annual BACUS Symposium on Photomask Technology, (27 December 2002); doi: 10.1117/12.467850
Show Author Affiliations
Robert C. Muller, LSI Logic Corp. (United States)
Glen W. Scheid, LSI Logic Corp. (United States)
Neal P. Callan, LSI Logic Corp. (United States)

Published in SPIE Proceedings Vol. 4889:
22nd Annual BACUS Symposium on Photomask Technology
Brian J. Grenon; Kurt R. Kimmel, Editor(s)

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