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Proceedings Paper

Parallel processing approach to transform-based image coding
Author(s): James O. Normile; Dan Wright; Ken Chu; Chia Lung Yeh
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Paper Abstract

This paper describes a flexible parallel processing architecture designed for use in real time video processing. The system consists of floating point DSP processors connected to each other via fast serial links, each processor has access to a globally shared memory. A multiple bus architecture in combination with a dual ported memory allows communication with a host control processor. The system has been applied to prototyping of video compression and decompression algorithms. The decomposition of transform based algorithms for decompression into a form suitable for parallel processing is described. A technique for automatic load balancing among the processors is developed and discussed, results ar presented with image statistics and data rates. Finally techniques for accelerating the system throughput are analyzed and results from the application of one such modification described.

Paper Details

Date Published: 1 June 1991
PDF: 5 pages
Proc. SPIE 1452, Image Processing Algorithms and Techniques II, (1 June 1991); doi: 10.1117/12.45405
Show Author Affiliations
James O. Normile, Apple Computer, Inc. (United States)
Dan Wright, Apple Computer, Inc. (United States)
Ken Chu, Apple Computer, Inc. (United States)
Chia Lung Yeh, Apple Computer, Inc. (United States)


Published in SPIE Proceedings Vol. 1452:
Image Processing Algorithms and Techniques II
Mehmet Reha Civanlar; Sanjit K. Mitra; Robert J. Moorhead, Editor(s)

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