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Proceedings Paper

Compression for reduction of off-chip video bandwidth
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Paper Abstract

The architecture for block-based video applications (e.g. MPEG/JPEG coding, graphics rendering) is usually based on a processor engine, connected to an external background SDRAM memory where reference images and data are stored. In this paper, we reduce the required memory bandwidth for MPEG coding up to 67% by identifying the optimal block configuration and applying embedded data compression up to a factor four. It is shown that independent compression of fixed-sized data blocks with a fixed compression ratio can decrease the memory bandwidth for a limited set of compression factors only. To achieve this result, we exploit the statistical properties of the burst-oriented data exchange to memory. It has been found that embedded compression is particularly attractive for bandwidth reduction when a compression ratio 2 or 4 is chosen. This moderate compression factor can be obtained with a low-cost compression scheme such as DPCM with a small acceptable loss of quality.

Paper Details

Date Published: 20 December 2001
PDF: 11 pages
Proc. SPIE 4674, Media Processors 2002, (20 December 2001); doi: 10.1117/12.451065
Show Author Affiliations
Egbert G.T. Jaspers, Philips Research Labs. (Netherlands)
Peter H. N. de With, CMG Eindhoven BV and Technische Univ. Eindhoven (Netherlands)


Published in SPIE Proceedings Vol. 4674:
Media Processors 2002
Sethuraman Panchanathan; V. Michael Bove; Subramania I. Sudharsanan, Editor(s)

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