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Proceedings Paper

On digit-recurrence division algorithms for self-timed circuits
Author(s): Nicolas Boullis; Arnaud Tisserand
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Paper Abstract

The optimization of algorithms for self-timed or asynchronous circuits requires specific solutions. Due to the variable-time capabilities of asynchronous circuits, the average computation time should be optimized and not only the worst case of the signal propagation. If efficient algorithms and implementations are known for asynchronous addition and multiplication, only straightforward algorithms have been studied for division. This paper compares several digit-recurrence division algorithms (speed, area and circuit activity for estimating the power consumption). The comparison is based on simulations of the different operators described at the gate level. This work shows that the best solutions for asynchronous circuits are quite different from those used in synchronous circuits.

Paper Details

Date Published: 20 November 2001
PDF: 11 pages
Proc. SPIE 4474, Advanced Signal Processing Algorithms, Architectures, and Implementations XI, (20 November 2001); doi: 10.1117/12.448640
Show Author Affiliations
Nicolas Boullis, Ecole Normale Superieure de Lyon (France)
Arnaud Tisserand, Ecole Normale Superieure de Lyon and INRIA (France)


Published in SPIE Proceedings Vol. 4474:
Advanced Signal Processing Algorithms, Architectures, and Implementations XI
Franklin T. Luk, Editor(s)

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