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Proceedings Paper

IP core design of template matching algorithm in image processing
Author(s): Quanqing Zhu; Xuecheng Zou; Zhenzhong Dong; Feng Huang; Xubang Shen
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Paper Abstract

This paper presents the design and implementation of template matching IP cores for image processing. Enhanced Moment Preserving Pattern Matching (MPPM) algorithm of template matching was adopted for efficient hardware implementation. The cores were coded in Verilog HDL for modularity and portability. The IP cores were validated in a XC4052XL FPGA and XESS XS40 prototyping board.

Paper Details

Date Published: 20 September 2001
PDF: 4 pages
Proc. SPIE 4555, Neural Network and Distributed Processing, (20 September 2001); doi: 10.1117/12.441685
Show Author Affiliations
Quanqing Zhu, Huazhong Univ. of Science and Technology (China)
Xuecheng Zou, Huazhong Univ. of Science and Technology (China)
Zhenzhong Dong, Huazhong Univ. of Science and Technology (China)
Feng Huang, Huazhong Univ. of Science and Technology (China)
Xubang Shen, Huazhong Univ. of Science and Technology (China)


Published in SPIE Proceedings Vol. 4555:
Neural Network and Distributed Processing

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