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Proceedings Paper

Mask process design optimization based on quality mapping using standard mask inspection equipment
Author(s): Shen Chung Kuo; TaiSheng Tan; Anja Rosenbusch; Yair Eran; Ofer Lindman; Gidon Gottlib
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Paper Abstract

With the advent of system-on-chip (SOC) devices, resolving typical problems of composite designs is getting more urgent. The continuous effort for achieving tighter critical dimension (CD) tolerances together with the known phenomena of pattern density loading makes the mask fidelity issue for SOC technology a unique and prominent issue. The typical characteristic of an SOC with respect to CD control is the diversity of linewidths and pattern density over the chip. This paper presents the metrology software called Linewidth Bias Monitor (LBM) as a method to characterize pattern-loading effects on an SOC.

Paper Details

Date Published: 5 September 2001
PDF: 8 pages
Proc. SPIE 4409, Photomask and Next-Generation Lithography Mask Technology VIII, (5 September 2001); doi: 10.1117/12.438374
Show Author Affiliations
Shen Chung Kuo, Taiwan Mask Corp. (Taiwan)
TaiSheng Tan, Taiwan Mask Corp. (Taiwan)
Anja Rosenbusch, Etec Systems, Inc. (United States)
Yair Eran, Etec Systems, Inc. (Israel)
Ofer Lindman, Etec Systems, Inc. (United States)
Gidon Gottlib, Etec Systems, Inc. (Israel)


Published in SPIE Proceedings Vol. 4409:
Photomask and Next-Generation Lithography Mask Technology VIII
Hiroichi Kawahira, Editor(s)

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