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Proceedings Paper

Chemical mechanical planarization process induced within lot overlay variation in 0.20-um DRAM: solution and simulation model
Author(s): Chih-Ping Chen; Brian Huang; Wilson Lee; Wen-Jye Chung; Holden T.K. Hou
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Paper Abstract

This study assesses the effectiveness of applying zero and non-zero alignment strategies to backend layers of a 0.20 micrometers DRAM process using two alignment methodology (TTL, Through the Lens Alignment, and Athena, Advanced Technology using High-Order Enhancement of Alignment) to investigate alignment mark deformation resulting from a chemical- mechanical planarization (CMP) process and thus compensate the deformation-induced overlay errors. Additionally, a mathematical model is proposed to verify that the intra and inter registration errors in TTL alignment originates from non-zero mark deformation. Several parameters in the CMP process, including pad rotation direction and pad life time are also examined to reduce the deformation-induced overlay errors. Results in this study demonstrate the effectiveness of this approach for tight and correctable compensation within whole lots, thereby demonstrating the optimal combinations of the CMP process parameters, types of alignment marks, and corresponding alignment positions.

Paper Details

Date Published: 22 August 2001
PDF: 9 pages
Proc. SPIE 4344, Metrology, Inspection, and Process Control for Microlithography XV, (22 August 2001); doi: 10.1117/12.436731
Show Author Affiliations
Chih-Ping Chen, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
Brian Huang, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
Wilson Lee, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
Wen-Jye Chung, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
Holden T.K. Hou, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)


Published in SPIE Proceedings Vol. 4344:
Metrology, Inspection, and Process Control for Microlithography XV
Neal T. Sullivan, Editor(s)

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