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Proceedings Paper

Insertion of EUVL into high-volume manufacturing
Author(s): Peter J. Silverman
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Paper Abstract

EUV Lithography has become the leading and perhaps only, candidate for extension of semiconductor lithography into the sub-50nm realm. This paper reviews the requirements for high volume, semiconductor lithography and examines the capability of EUVL to meet those challenges. The current state of EUVL technology is reviewed and the remaining challenges for insertion of EUVL into manufacturing are discussed.

Paper Details

Date Published: 20 August 2001
PDF: 7 pages
Proc. SPIE 4343, Emerging Lithographic Technologies V, (20 August 2001); doi: 10.1117/12.436631
Show Author Affiliations
Peter J. Silverman, Intel Corp. (United States)

Published in SPIE Proceedings Vol. 4343:
Emerging Lithographic Technologies V
Elizabeth A. Dobisz, Editor(s)

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