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Proceedings Paper

Asymmetric biasing for subgrid pattern adjustment
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Paper Abstract

The location of a printed edge can be controlled to a fineness that is two orders of magnitude smaller than the design grid, if a slight displacement of the pattern can be tolerated. The essence of this asymmetric subgrid biasing technique is the crenelation of two edges of a pattern into different periods. Fractional arithmetic results in a bias increment that much smaller than that can be achieved with halftone biasing. For a design grid of 20 nm (1X), and an exposure system with (lambda) equals 248 nm, NA equals 0.68, and (sigma) equals 0.8, the bias increment can be as small as 0.22 nm.

Paper Details

Date Published: 14 September 2001
PDF: 6 pages
Proc. SPIE 4346, Optical Microlithography XIV, (14 September 2001); doi: 10.1117/12.435697
Show Author Affiliations
Alfred K. K. Wong, Univ. of Hong Kong (Hong Kong)
Lars W. Liebmann, IBM Semiconmductor Research and Development Ctr. (United States)

Published in SPIE Proceedings Vol. 4346:
Optical Microlithography XIV
Christopher J. Progler, Editor(s)

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