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Proceedings Paper

Transformation from C-program to circuitry for a dynamically reconfigurable cell array processor
Author(s): Takayuki Morishita; Kiyotaka Komoku; Fumihiro Hatano; Iwao Teramoto
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Paper Abstract

We have been developing a parallel processor that it is possible to reconfigure hardware according to a software. Dynamic Reconfiguration means to change a kind of and a number of processing elements and connection between processing elements at real time. Our proposed processor creates a very long pipeline, which is able to execute for-loop calculation at very high speed. In this paper, we develop an algorithm which transform automatically a c-language program to a circuit diagram. Especially, we consider processing method of if-sentence and for-sentence and realize high-performance processing of them by a pipeline processing. The automatic transforming program is created by c-language. Finally, we examine a performance of this processor by using a MPEG decoding program.

Paper Details

Date Published: 24 July 2001
PDF: 8 pages
Proc. SPIE 4525, Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, (24 July 2001); doi: 10.1117/12.434378
Show Author Affiliations
Takayuki Morishita, Okayama Prefectural Univ. (Japan)
Kiyotaka Komoku, Okayama Prefectural Univ. (Japan)
Fumihiro Hatano, Okayama Prefectural Univ. (Japan)
Iwao Teramoto, Okayama Prefectural Univ. (Japan)


Published in SPIE Proceedings Vol. 4525:
Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III
John Schewel; Peter M. Athanas; Philip B. James-Roxby; John T. McHenry, Editor(s)

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