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Proceedings Paper

Efficient control structures for digital programmable retinas
Author(s): Thierry M. Bernard
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Paper Abstract

A digital programmable artificial retina (PAR) is a functional extension of a CMOS imager, in which every pixel is fitted with a local ADC and a tiny digital programmable processor. From an architectural viewpoint, a PAR is an SIMD array processor with local optical input. A PAR is aimed at processing images on-site until they can be output from the array under concentrated form. The overall goal is to get compact, fast and inexpensive vision systems, in particular for robotics applications. A 256 by 256 PAR with up to a few tens bits of local memory per pixel is now within reach at reasonable cost. However, whereas the local memory size benefits quadratically from the feature size decrease, wiring density improvement can only be linear, at best. So control should become more complex with the danger of a growing proportion of the digital pixel area being devoted to instruction or address decoding. We propose efficient scalable solutions to this problem at the architectural, circuit and topological levels, which attempt to minimize both silicon area and power consumption.

Paper Details

Date Published: 15 May 2001
PDF: 10 pages
Proc. SPIE 4306, Sensors and Camera Systems for Scientific, Industrial, and Digital Photography Applications II, (15 May 2001); doi: 10.1117/12.426985
Show Author Affiliations
Thierry M. Bernard, Ecole Nationale Superieure des Techniques Avancees (France)


Published in SPIE Proceedings Vol. 4306:
Sensors and Camera Systems for Scientific, Industrial, and Digital Photography Applications II
Nitin Sampat; Morley M. Blouke; John Canosa; John Canosa; Nitin Sampat, Editor(s)

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