Share Email Print
cover

Proceedings Paper

20-μm deep trench isolation process characterization for linear bipolar ICs
Author(s): Terry Dyer; Ian J. Doohan; Martin Fallon; Dave McAlpine; Adam Aitkenhead; Jim McGinty; M. Taylor; Philip Gravelle; A. Schouten; M. Bryce
Format Member Price Non-Member Price
PDF $14.40 $18.00

Paper Abstract

The use of junction isolation in linear bipolar ICs substantially consumes silicon area. The replacement of junction isolation with trench isolation has the potential to significantly reduce device area while maintaining high voltage operation. Deep trench isolation has been implemented on a conventional non- complementary 40V (NPN BVceo) linear IC process. A fully functional lower power operational amplifier has been fabricated as a technology driver. Device characterization shows that transistor leakage currents (Iceo) and leakage between trench tubs can be made comparable with junction isolated devices. The NPN buried layer can successfully be butted against the trench sidewall without device degradation, although this is currently not possible with the NPN base. An NPN device shrink of 3X has been achieved and further development is underway to increase this towards the 4X level, where the base diffusion front touches the trench sidewall.

Paper Details

Date Published: 20 April 2001
PDF: 6 pages
Proc. SPIE 4405, Process and Equipment Control in Microelectronic Manufacturing II, (20 April 2001); doi: 10.1117/12.425246
Show Author Affiliations
Terry Dyer, National Semiconductor Ltd. (United Kingdom)
Ian J. Doohan, National Semiconductor Ltd. (United Kingdom)
Martin Fallon, National Semiconductor Ltd. (United Kingdom)
Dave McAlpine, National Semiconductor Ltd. (United Kingdom)
Adam Aitkenhead, National Semiconductor Ltd. (United Kingdom)
Jim McGinty, National Semiconductor Ltd. (United Kingdom)
M. Taylor, National Semiconductor Ltd. (United Kingdom)
Philip Gravelle, National Semiconductor Ltd. (United Kingdom)
A. Schouten, National Semiconductor Ltd. (United Kingdom)
M. Bryce, National Semiconductor Ltd. (United Kingdom)


Published in SPIE Proceedings Vol. 4405:
Process and Equipment Control in Microelectronic Manufacturing II
Martin Fallon, Editor(s)

© SPIE. Terms of Use
Back to Top