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Proceedings Paper

Architecture for Bezier clipping algorithm
Author(s): Montserrat Boo; Javier Diaz Bruguera; Emilio Lopez-Zapata
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Paper Abstract

Ray tracing is a rendering technique for producing high quality and photo-realistic images. The basic requirement for ray tracing a specific geometric primitive is the calculation of intersections between rays and the geometry. Bezier clipping algorithm is a promising technique for computing high quality spline-ray interactions but the slowness of this technique suggests the utilization of specific VLSI architectures. In this paper we present an improved algorithm for Bezier clipping and its VLSI implementation. Specifically, some modifications over the original algorithm have been developed in order to avoid the non-constant number of cycles per iteration and the undesirable and inherent division operations of the original algorithm. As a result, we obtain a regular architecture, characterized by a fixed and optimum scheduling, which minimizes the timing requirements of the Bezier clipping algorithm.

Paper Details

Date Published: 29 March 2001
PDF: 7 pages
Proc. SPIE 4313, Media Processors 2001, (29 March 2001); doi: 10.1117/12.420801
Show Author Affiliations
Montserrat Boo, Univ. de Santiago de Compostela (Spain)
Javier Diaz Bruguera, Univ. de Santiago de Compostela (Spain)
Emilio Lopez-Zapata, Univ. de Malaga (Spain)

Published in SPIE Proceedings Vol. 4313:
Media Processors 2001
Sethuraman Panchanathan; V. Michael Bove Jr.; Subramania I. Sudharsanan, Editor(s)

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