Share Email Print

Proceedings Paper

Technique for implementing arbitrary Boolean functions in threshold logic
Author(s): Peter Celinski; Gregory D. Sherman; Derek Abbott
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

The main result of this paper is the development of a systematic paper-and-pencil design methodology for implementing Boolean functions of up to 4 variables using threshold logic (TL) gates, which does not require linear programming, for the first time. The method is similar in operation to the Karnaugh map logic minimization technique, and is based on determining the minimum threshold cover of a Boolean function. The paper also reviews aspects of TL and discusses aspects of the proposed design methodology when combined with the implementation issues present in neuron-MOS based TL gates. Two circuit design examples using the proposed technique are given.

Paper Details

Date Published: 16 March 2001
PDF: 12 pages
Proc. SPIE 4236, Smart Electronics and MEMS II, (16 March 2001); doi: 10.1117/12.418772
Show Author Affiliations
Peter Celinski, Adelaide Univ. (Australia)
Gregory D. Sherman, Adelaide Univ. (Australia)
Derek Abbott, Adelaide Univ. (Australia)

Published in SPIE Proceedings Vol. 4236:
Smart Electronics and MEMS II
Derek Abbott; Vijay K. Varadan; Karl F. Boehringer, Editor(s)

© SPIE. Terms of Use
Back to Top