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Proceedings Paper

Combined unsigned and two's complement saturating multipliers
Author(s): Michael J. Schulte; Mustafa Gok; Pablo I. Balzola; Robert W. Brocato
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Paper Abstract

In many digital signal processing and multimedia applications, results that overflow are saturated to the most positive or most negative representable number. This paper presents efficient techniques for performing saturating n-bit integer multiplication on unsigned and two's complement numbers. Unlike conventional techniques for saturating multiplication, which compute a 2n-bit product and then examine the n most significant product bits to determine if overflow has occurred, the techniques presented in this paper compute only the (n + 1) least significant bits of the product. Specialized overflow detection units, which operate in parallel with the multiplier, determine if overflow has occurred and the product should be saturated. These techniques are applied to designs for saturating array multipliers that perform either unsigned or two's complement saturating integer multiplication, based on an input control signal. Compared to array multipliers that use conventional methods for saturation, these multipliers have about half as much area and delay.

Paper Details

Date Published: 13 November 2000
PDF: 12 pages
Proc. SPIE 4116, Advanced Signal Processing Algorithms, Architectures, and Implementations X, (13 November 2000); doi: 10.1117/12.406496
Show Author Affiliations
Michael J. Schulte, Lehigh Univ. (United States)
Mustafa Gok, Lehigh Univ. (United States)
Pablo I. Balzola, Lehigh Univ. (United States)
Robert W. Brocato, Sandia National Labs. (United States)


Published in SPIE Proceedings Vol. 4116:
Advanced Signal Processing Algorithms, Architectures, and Implementations X
Franklin T. Luk, Editor(s)

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