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Proceedings Paper

Calibration requirements for identifying and sizing wafer defects by scanner measurements
Author(s): John C. Stover; Craig A. Scheer
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Paper Abstract

New particle scanner capabilities are needed to meet requirements for the next generation of devices in the semiconductor industry. Among these, defect identification and sizing are very important. This paper shows the key role of accurate scanner calibration to achieving these advances in scanner capability. An example, using modeled results from a hypothetical scanner geometry, analyzes the ability to discriminate surface pits from silicon particles for differing levels uncertainty in the PSL calibration spheres.

Paper Details

Date Published: 2 November 2000
PDF: 6 pages
Proc. SPIE 4099, Optical Metrology Roadmap for the Semiconductor, Optical, and Data Storage Industries, (2 November 2000); doi: 10.1117/12.405832
Show Author Affiliations
John C. Stover, ADE Corp. (United States)
Craig A. Scheer, ADE Corp. (United States)


Published in SPIE Proceedings Vol. 4099:
Optical Metrology Roadmap for the Semiconductor, Optical, and Data Storage Industries
Ghanim A. Al-Jumaily; Angela Duparre; Bhanwar Singh, Editor(s)

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