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Proceedings Paper

Effect of annealing after metal etch on analog device and its impact on yield performance
Author(s): Madhusudan Mukhopadhyay; Teo Yeow Meng; Lim Sieng Ye; Rajan Rajgopal
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Paper Abstract

This paper demonstrates the importance of annealing in presence of forming gas after first layer metal etch in analog devices. A drop of 3 mA analog power supply current has been observed. DC-offset value has also reduced from 40 mV-14mV. Yield performance of the device has improved dramatically. All these lead to the improvement of the device performance and demonstrate the degradation of MOSFET matching circuits and analog capacitors during metal etch.

Paper Details

Date Published: 23 October 2000
PDF: 4 pages
Proc. SPIE 4229, Microelectronic Yield, Reliability, and Advanced Packaging, (23 October 2000); doi: 10.1117/12.404866
Show Author Affiliations
Madhusudan Mukhopadhyay, Chartered Semiconductor Manufacturing, Ltd. (Singapore)
Teo Yeow Meng, Chartered Semiconductor Manufacturing, Ltd. (Singapore)
Lim Sieng Ye, Chartered Semiconductor Manufacturing, Ltd. (Singapore)
Rajan Rajgopal, Chartered Semiconductor Manufacturing, Ltd. (Singapore)

Published in SPIE Proceedings Vol. 4229:
Microelectronic Yield, Reliability, and Advanced Packaging
Cher Ming Tan; Yeng-Kaung Peng; Mali Mahalingam; Krishnamachar Prasad, Editor(s)

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