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Proceedings Paper

Technology of electroplating copper with low-K material a-C:F for 0.15-μm damascence interconnection
Author(s): Jia-Min Shieh; Shich-Chang Suen; Kuen-Chaung Lin; Shih-Chieh Chang; Bau-Tong Dai; Chia-Fu Chen; Ming Shiann Feng
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Paper Abstract

In our work, fluorinated amorphous carbon films (a-C:F) was deposited by PECVD. The amorphous carbon films (a-C:F) with low dielectric constant (K-2.3), thermal stability and acceptable adhesion to cap-layer such as SiOF was obtained by optimum of content ration between carbon with fluorine and adding few SiH4 for improvement of adhesion. The etching profile with high aspect ratio and etching selection ration more than 50 (a- C:F/SiOF) were obtained by etching gas of N2+O2. Furthermore, we demonstrated the technology of electroplating copper in trenches or vias as small as 0.15 micrometers , 6:1 AR. The wetting agent system was consisted of mainly two molecular weights polyethylene glycols (PEG). The small molecular weight PEG with better diffusion ability for reducing the surface tension and the larger PEG enhancing grain growth control was proposed for the first time to wet the inner portion of the sub- 150 nm damascene feature. The leveling agent system was mainly heterocyclic compound contained N, S atoms offering sufficient activation over-potential and selective inhibition gradient.

Paper Details

Date Published: 18 August 2000
PDF: 8 pages
Proc. SPIE 4181, Challenges in Process Integration and Device Technology, (18 August 2000); doi: 10.1117/12.395747
Show Author Affiliations
Jia-Min Shieh, National Nano Device Labs./National Chiao Tung Univ. (Taiwan)
Shich-Chang Suen, National Nano Device Labs./National Chiao Tung Univ. (Taiwan)
Kuen-Chaung Lin, National Chiao Tung Univ. (Taiwan)
Shih-Chieh Chang, National Chiao Tung Univ. (Taiwan)
Bau-Tong Dai, National Nano Device Labs./National Chiao Tung Univ. (Taiwan)
Chia-Fu Chen, National Chiao Tung Univ. (Taiwan)
Ming Shiann Feng, National Chiao Tung Univ. (Taiwan)


Published in SPIE Proceedings Vol. 4181:
Challenges in Process Integration and Device Technology
David Burnett; Shin'ichiro Kimura; Bhanwar Singh, Editor(s)

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