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Proceedings Paper

Backwafer optical lithography and wafer distortion in substrate transfer technologies
Author(s): Henk W. Van Zeijl; J. Slabbekoorn; L. K. Nanver; Paul W.L. Van Dijk; Axel Berthold; T. Machielsen
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Paper Abstract

A method has been developed by which, after removal of the bulk silicon in a substrate transfer process, the backside of a wafer can be processed with the same lithography as the front side of the wafer. To achieve an accurate front-to-backwafer alignment accuracy, mirror symmetric alignment markers for an ASML PAS5000 waferstepper have been developed and applied in a Silicon-on- Anything process. In this manner minimum dimension low-ohmic contacts were fabricated on the backwafer. The mirror symmetric alignment markers are used in combination with standard overlay test procedures to characterize the front-to backwafer overlay accuracy. The measured overlay errors are divided up in non- mirror symmetric lens distortions and wafer distortion as a result of the substrate transfer process. The practical minimum device feature that can be realized on the backwafer is limited to 0.9-1.2 micrometers as a result of front-to-backwafer overlay errors.

Paper Details

Date Published: 18 August 2000
PDF: 8 pages
Proc. SPIE 4181, Challenges in Process Integration and Device Technology, (18 August 2000); doi: 10.1117/12.395730
Show Author Affiliations
Henk W. Van Zeijl, Delft Univ. of Technology (Netherlands)
J. Slabbekoorn, Delft Univ. of Technology (Netherlands)
L. K. Nanver, Delft Univ. of Technology (Netherlands)
Paul W.L. Van Dijk, ASML (Netherlands)
Axel Berthold, Delft Univ. of Technology (Netherlands)
T. Machielsen, Philips Research Labs. (Netherlands)

Published in SPIE Proceedings Vol. 4181:
Challenges in Process Integration and Device Technology
David Burnett; Shin'ichiro Kimura; Bhanwar Singh, Editor(s)

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