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Proceedings Paper

Gate CD control for full chip using total-process-proximity-based correction method
Author(s): Byung-Ho Nam; Jong O Park; Dai Jong Lee; Jong Ho Cheong; Young Ju Hwang; Young Jin Song
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Paper Abstract

In this study, we investigated mask errors, photo errors with attenuated phase shift mask and off-axis illumination, and etch errors in dry etch condition. We propose that total process proximity correction (TPPC), a concept merging every step error correction, is essential in lithography process when minimum critical dimension (CD) smaller than the wavelength of radiation. A correction rule table was experimentally obtained applying TPPC concept. Process capability of controlling gate CD in DRAM fabrication should be improved by this method.

Paper Details

Date Published: 19 July 2000
PDF: 9 pages
Proc. SPIE 4066, Photomask and Next-Generation Lithography Mask Technology VII, (19 July 2000); doi: 10.1117/12.392101
Show Author Affiliations
Byung-Ho Nam, Hyundai Electronics Industries Co., Ltd. (South Korea)
Jong O Park, Hyundai Electronics Industries Co., Ltd. (South Korea)
Dai Jong Lee, Hyundai Electronics Industries Co., Ltd. (South Korea)
Jong Ho Cheong, Hyundai Electronics Industries Co., Ltd. (South Korea)
Young Ju Hwang, Hyundai Electronics Industries Co., Ltd. (South Korea)
Young Jin Song, Hyundai Electronics Industries Co., Ltd. (South Korea)


Published in SPIE Proceedings Vol. 4066:
Photomask and Next-Generation Lithography Mask Technology VII
Hiroaki Morimoto, Editor(s)

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