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Proceedings Paper

Scaled CMOS MEMS for real-time infrared scene generation
Author(s): Bruce W. Offord; H. Ronald Marlin; Richard L. Bates; Gordon C. Perkins; Chris Hutchens; Derek Yunchih Huang
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Paper Abstract

CMOS/MEMS is used as a technique to create infrared emitters. A commercial CMOS process is used that, with a post-processing silicon etch, creates thermally isolated, electronically addressable polysilicon resistors suitable for infrared scene generation. Previous efforts have focused on 2.0 micron CMOS processes which require large suspended structures in order to accommodate the design rules. This work has successfully used a 1.2 micron commercial process with a post-processing silicon etch to scale down the emitter structure to 40 X 40 microns. This allows higher density arrays, and together with using the high value poly resistor available in the 1.2 micrometer process, allows lower current operation, significantly relaxing the design constraints previously encountered. A 128 X 128 design was fabricated in this process and is characterized using a microradiometer. A silicon-on-insulator thermal pixel array design with a further reduction in emitter dimensions is also presented.

Paper Details

Date Published: 12 July 2000
PDF: 10 pages
Proc. SPIE 4027, Technologies for Synthetic Environments: Hardware-in-the-Loop Testing V, (12 July 2000); doi: 10.1117/12.391678
Show Author Affiliations
Bruce W. Offord, Space and Naval Warfare Systems Ctr., San Diego (United States)
H. Ronald Marlin, Titan Inc. (United States)
Richard L. Bates, Space and Naval Warfare Systems Ctr., San Diego (United States)
Gordon C. Perkins, Titan Inc. (United States)
Chris Hutchens, Oklahoma State Univ. (United States)
Derek Yunchih Huang, Oklahoma State Univ. (United States)


Published in SPIE Proceedings Vol. 4027:
Technologies for Synthetic Environments: Hardware-in-the-Loop Testing V
Robert Lee Murrer, Editor(s)

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