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Proceedings Paper

OPC for logic and embedded applications: the reverse approach
Author(s): Uwe Paul Schroeder; Tobias Mono
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Paper Abstract

In this paper we demonstrate a method of correcting optical proximity effects, which is specifically tailored for logic applications. Since the lithographic process window for printing logic features is predominantly determined by isolated lines, it makes sense to optimize the exposure conditions for isolated features, and then correct more nested features. As a result, the common process window is improved. Another benefit from this technique is that a smaller fraction of structures has to be corrected, thus reducing computation time and data volume. This makes this method useful also for logic application with embedded dense features.

Paper Details

Date Published: 5 July 2000
PDF: 5 pages
Proc. SPIE 4000, Optical Microlithography XIII, (5 July 2000); doi: 10.1117/12.388933
Show Author Affiliations
Uwe Paul Schroeder, Infineon Technologies Inc. (United States)
Tobias Mono, Infineon Technologies Inc. (United States)


Published in SPIE Proceedings Vol. 4000:
Optical Microlithography XIII
Christopher J. Progler, Editor(s)

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