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Proceedings Paper

Lithography process control and optimization based on defect capture and reduction
Author(s): Jeffrey A. Leavey; John Boyle; Andrew Skumanich
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Paper Abstract

Defect monitoring is increasingly required for advanced line maintenance. A critical decision is how to proceed with lot deposition if an excursion is detected. A methodology based on defect inspection and defective die count analysis was employed which provided effective process monitoring and yield maintenance. The methodology allows rapid decision-making with a minimum of information for lot disposition. The purpose is to separate significant excursions from temporary fluctuations in order to appropriately focus defect reduction resources. Wafers are systematically inspected post-litho with a patterned wafer inspection system, the WF736, and the number of die with killer defects is counted and then monitored with time. Every lot is inspected, full wafer inspection is performed, and all defect types are captured. By determining the killer defect progression after re-work, it is possible to establish lot disposition. If the count is still high, defect reduction analysis is then applied. Various defects were flagged and addressed, arising both from litho and from prior steps. In addition, the wafer inspection was utilized for dose forecasting with a feed-forward to appropriately modify the optimal dose. Good line control and yield maintenance were observed.

Paper Details

Date Published: 2 June 2000
PDF: 6 pages
Proc. SPIE 3998, Metrology, Inspection, and Process Control for Microlithography XIV, (2 June 2000); doi: 10.1117/12.386484
Show Author Affiliations
Jeffrey A. Leavey, IBM Microelectronics Div. (United States)
John Boyle, Applied Materials (United States)
Andrew Skumanich, Applied Materials (United States)


Published in SPIE Proceedings Vol. 3998:
Metrology, Inspection, and Process Control for Microlithography XIV
Neal T. Sullivan, Editor(s)

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