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Proceedings Paper

Paradigm for selecting the optimum classifier in semiconductor automatic defect classification applications
Author(s): Martin A. Hunt; James S. Goddard; James A. Mullens; Regina K. Ferrell; Bobby R. Whitus; Ariel Ben-Porath
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Paper Abstract

The automatic classification of defects found on semiconductor wafers using a scanning electron microscope (SEM) is a complex task that involves many steps. The process includes re- detecting the defect, measuring attributes of the defect, and automatically assigning a classification. In many cases, especially during product ramp-up, and when multiple products are manufactured in the same line, there are few training examples for an automatic defect classification (ADC) system. This condition presents a problem for traditional supervised parametric and nonparametric learning techniques. In this paper we investigate the attributes of several approaches to ADC and compare their performance under a variety of available training data scenarios. We have selected to characterize the attributes and performance of a traditional K-nearest neighbor classifier, probabilistic neural network (PNN), and rule-based classifier in the context of SEM ADC. The PNN classifier is a nonparametric supervised classifier that is built around a radial basis function (RBF) neural network architecture. A basic summary of the PNN will be presented along with the generic strengths and weakness described in the literature and observed with actual semiconductor defect data. The PNN classifier is able to manage conditions such as non-convex class distributions and single class multiple clusters in feature space. A rule-based classifier producing built-in core classes provided by the Applied Materials SEMVision tool will be characterized in the context of both few examples and no examples. An extensive set of fab generated data is used to characterize the performance of these ADC approaches. Typical data sets contain from 30 to greater than 200. The number of classes in the data set range from 4 to more than 12. The conclusions reached from this analysis indicate that the strengths of each method are evident under specific conditions that are related to different stages within the VLSI yield curve, and to the number of different products in the line.

Paper Details

Date Published: 2 June 2000
PDF: 8 pages
Proc. SPIE 3998, Metrology, Inspection, and Process Control for Microlithography XIV, (2 June 2000); doi: 10.1117/12.386481
Show Author Affiliations
Martin A. Hunt, Oak Ridge National Lab. (United States)
James S. Goddard, Oak Ridge National Lab. (United States)
James A. Mullens, Oak Ridge National Lab. (United States)
Regina K. Ferrell, Oak Ridge National Lab. (United States)
Bobby R. Whitus, Oak Ridge National Lab. (United States)
Ariel Ben-Porath, Applied Materials (Israel)


Published in SPIE Proceedings Vol. 3998:
Metrology, Inspection, and Process Control for Microlithography XIV
Neal T. Sullivan, Editor(s)

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