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Proceedings Paper

System integration for visual pattern processing based on CMOS technology
Author(s): Donghui Guo; Suntao Wu; Gerard Parr; Ruitang Liu; Boxi Wu
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Paper Abstract

An integrated system for visual pattern processing was proposed in this paper for implemented with CMOS technology. It consists of three parts: Variable Sensitivity Photo Detectors, control circuit, and parallel network. A 256 X 256 pixels array of 3-bits resolution is designed into the system chip for pattern recognition. In order to testing the design result, it was simulated with Spice model parameters of 1.2 micrometers CMOS process.

Paper Details

Date Published: 9 May 2000
PDF: 4 pages
Proc. SPIE 4077, International Conference on Sensors and Control Techniques (ICSC 2000), (9 May 2000); doi: 10.1117/12.385574
Show Author Affiliations
Donghui Guo, Xiamen Univ. (China)
Suntao Wu, Xiamen Univ. (China)
Gerard Parr, Univ. of Ulster/Coleraine (United Kingdom)
Ruitang Liu, Xiamen Univ. (China)
Boxi Wu, Xiamen Univ. (China)


Published in SPIE Proceedings Vol. 4077:
International Conference on Sensors and Control Techniques (ICSC 2000)
Desheng Jiang; Anbo Wang, Editor(s)

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