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Proceedings Paper

Experimental demonstration of real-time image processing using a VLSI analog programmable array processor
Author(s): Gustavo Linan; Rafael Dominguez-Castro; Servando Espejo; Elisenda Roca; Peter Foldesy; Angel Rodriguez-Vazquez
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Paper Abstract

This paper describes a full-custom mixed-signal chip which embeds distributed optical signal acquisition, digitally- programmable analog parallel processing, and distributed image memory--cache--on a common silicon substrate. The paper briefly describes the chip architecture and focus mostly on presenting experimental evidence of the chip functionality. Multiscale low-pass and high-pass filtering of gray-scale images, analog edges extraction, image segmentation, thresholded gradient detection, mathematical morphology operations, shortest path detection in a labyrinth, skeletonizing, image reconstruction, several non- linear type image processing tasks like absolute value calculation of gray-scale gradient detection and real-time motion detection in QCIF video sequences are some of the very interesting applications that have been demonstrated as available when using the prototype.

Paper Details

Date Published: 14 April 2000
PDF: 11 pages
Proc. SPIE 3962, Applications of Artificial Neural Networks in Image Processing V, (14 April 2000); doi: 10.1117/12.382917
Show Author Affiliations
Gustavo Linan, Ctr. Nacional de Microelectronica and Univ. de Sevilla (Spain)
Rafael Dominguez-Castro, Ctr. Nacional de Microelectronica and Univ. de Sevilla (Spain)
Servando Espejo, Ctr. Nacional de Microelectronica andUniv. de Sevilla (Spain)
Elisenda Roca, Ctr. Nacional de Microelectronica and Univ. de Sevilla (Spain)
Peter Foldesy, Ctr. Nacional de Microelectronical and Hungarian Academy of Sciences (Spain)
Angel Rodriguez-Vazquez, Ctr. Nacional de Microelectronica and Univ. de Sevilla (Spain)


Published in SPIE Proceedings Vol. 3962:
Applications of Artificial Neural Networks in Image Processing V
Nasser M. Nasrabadi; Aggelos K. Katsaggelos, Editor(s)

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