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Proceedings Paper

Development of low-temperature wafer level vacuum packaging for microsensors
Author(s): Wei-Feng Huang; Jin-Shown Shie; Cheng-Kuo Lee; Shih Chin Gong; Cheng-Jien Peng
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Paper Abstract

Wafer level packaging received lots of attention in microsystems recently. Because it shows the potential to reduce the packaging can be increased. However, there is a limitation of commercialized wafer bonding technology, i.e., the high process temperature, such as 1000 degrees C of silicon fusion bonding, and 450 degrees C of anodic bonding.A novel low temperature wafer bonding with process temperature lower than 160 degrees C is proposed, it applies the In-Sn alloy to form the interface of wafer bonding. The experiment results show helium leak test of 6 X 10-9 torr-liter/sec, and a tensile strength as high as 200kg/cm2. Reliability test after 1500 temperature cycles between -10 to 80 degrees C also shows no trace of degradation compared to the initial quality of the samples. This low temperature soldering process demonstrates its promising potential at the wafer level packaging in industrial production.

Paper Details

Date Published: 8 October 1999
PDF: 8 pages
Proc. SPIE 3893, Design, Characterization, and Packaging for MEMS and Microelectronics, (8 October 1999); doi: 10.1117/12.368460
Show Author Affiliations
Wei-Feng Huang, National Chiao Tung Univ. (Taiwan)
Jin-Shown Shie, National Chiao Tung Univ. (Taiwan)
Cheng-Kuo Lee, Metrodyne Microsystem Corp. (Taiwan)
Shih Chin Gong, Metrodyne Microsystem Corp. (Taiwan)
Cheng-Jien Peng, Industrial Technology Research Institute (Taiwan)


Published in SPIE Proceedings Vol. 3893:
Design, Characterization, and Packaging for MEMS and Microelectronics
Bernard Courtois; Serge N. Demidenko, Editor(s)

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