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Proceedings Paper

Mainstreaming SOI CMOS technology
Author(s): Ghavam G. Shahidi
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Paper Abstract

Partially-depleted deep sub-micron CMOS on SOI technology is becoming a mainstream technology. This technology offers 20- 35 percent performance gain over a bulk technology implemented with the same tool set. In this paper, first a review of the SOI technology is given. Next, the partially- depleted SOI device and the reasons why it was chosen over fully depleted SOI device are reviewed. The sources of performance gain on SOI, and SOI-unique circuit issues that a designer must consider and account are discussed next. Finally, a low-power application of SOI is reviewed.

Paper Details

Date Published: 1 September 1999
PDF: 7 pages
Proc. SPIE 3881, Microelectronic Device Technology III, (1 September 1999); doi: 10.1117/12.360562
Show Author Affiliations
Ghavam G. Shahidi, IBM Microelectronics Div. (United States)

Published in SPIE Proceedings Vol. 3881:
Microelectronic Device Technology III
David Burnett; Toshiaki Tsuchiya, Editor(s)

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